The research group of Professor Hideo Ohno of the Center for Spintronics Integrated Systems, the Research Institute of Electrical Communication, and the WPI Advanced Institute for Materials Research, together with ULVAC, successfully fabricated magnetic tunnel junctions with a diameter reduced to 11 nm. They demonstrated that high thermal stability and low power consumption can be simultaneously achieved by using magnetic tunnel junctions with materials developed at a junction diameter of less than 20 nm. The results indicate that spintronics based memory using magnetic tunnel junctions can be realized at a 20 nm technology node or less where challenging issues for realizing semiconductor based memories are present.
Semiconductor based memories such as dynamic random access memory and static random access memory*1 are used in microelectronics as not only stand-alone memory but also cache memory in integrated circuits. In semiconductor based memories, capacity enlargement and performance improvement have thus far been achieved by reducing the device size. However, there are challenging issues facing semiconductor based memories fabricated at a technology node*2 down of 20 nm or less. Semiconductor based memories are based on the electric charge of the electron. In contrast, spintronics devices are based on both the electric charge and the spin of the electron.The magnetic tunnel junction*3 is one of the representatives of spintronics devices. It has three features: 1) suitability for high capacity memory owing to its small footprint, 2) high access and writing speed, and 3) unlimited endurance for writing in principle. Semiconductor based memories also have these three features. Compared to semiconductor based memories, spintronics based memories using a magnetic tunnel junction have one key advantage: nonvolatility resulting from the nature of the ferromagnetic materials. Because of this nonvolatility, no power is required to retain the information, which means standby power can be drastically reduced.To establish spintronics based memories, it is necessary that the size reduction of magnetic tunnel junctions be compatible with that of the semiconductor devices underneath while maintaining nonvolatility and low power consumption. Although research on nonvolatile memory using magnetic tunnel junctions has been performed by many semiconductor companies, universities, and research institutes throughout the world, none have yet demonstrated magnetic tunnel junctions with high thermal stability and low power consumption at a sufficiently small junction size for 20 nm technology node or less where challenging issues for realizing semiconductor based memories are present.
The group consisting of researchers from Tohoku University and ULVAC developed a process of fabricating magnetic tunnel junctions with a diameter down to 11 nm in which materials using double CoFeB-MgO*4 interfaces developed by the same research group in Tohoku University that can simultaneously realize both high thermal stability and low power consumption were used. They evaluated the tunnel magnetoresistance ratio, thermal stability, and writing current for the fabricated CoFeB-MgO magnetic tunnel junctions and obtained the following properties at a junction size of 20 nm in diameter: 1) the world's highest thermal stability Δ = 60*5 , 2) a high tunnel magnetoresistance ratio of ~120%*6 , and 3) a low writing current = 24 μA. These results demonstrate that nonvolatile memory using magnetic tunnel junctions as spintronics devices can be realized at a technology node of less than 20 nm, which is a significant step toward realizing spintronics based memories.
Their present research demonstrates the high potential of magnetic tunnel junctions in realizing nonvolatile spintronics based memories at a technology node of less than 20 nm as a replacement of semiconductor based memories. Thus, the present research is a significant advancement towards the realization of spintronics based memories with very large capacity using magnetic tunnel junctions.
Tohoku University announced their latest results on December 9 at the 2013 IEEE International Electron Devices Meeting (December 9-11, Washington, D.C., USA).
This work was supported by the Japan Society for the Promotion of Science (JSPS) through its "Funding Program for World-Leading Innovative R&D on Science and Technology (FIRST Program)" and Research and Development for Next-Generation Information Technology of the Ministry of Education, Culture, Sports, Science and Technology.
*1 Semiconductor based memories are devices that use the electric charge of electrons to temporarily store information. Dynamic random access memories, which are usually used in the main memory of integrated circuits, store the information as an electric charge in a capacitor. The capacitor should have sufficient capacitance for stable operation. The capacitor is formed by digging a trench. The decrease in capacitance due to the size reduction has been overcome by deepening the trench, but a technical limit of fabrication is rapidly approaching. Also, in SRAMs, it has become difficult to secure the circuit operation margin due to the increase in the intrinsic variability of the threshold voltage of MOSFETs as the device size is reduced.
*2 Technological generation for semiconductor devices. Thus far, developers have had great success with reducing the size of semiconductor based devices. However, semiconductor devices such as dynamic random access memory and static access memory need to overcome very challenging issues when technology nodes advance to less than 20 nm.
*3 Magnetic tunnel junctions consist of a structure that has two ferromagnetic electrodes sandwiching an insulating layer. When the magnetization direction between the two ferromagnetic electrodes is parallel (antiparallel), the resistance shows a low (high) value, which is called the tunnel magnetoresistance effect.
*4 CoFeB-MgO is the material used in the system that demonstrated the world's highest tunnel magnetoresistance ratio at room temperature by a research group at Tohoku University in 2008. In addition, the same research group first fabricated CoFeB-MgO magnetic tunnel junctions with a perpendicular easy-axis by making use of special magnetic anisotropy at the CoFeB-MgO interface and demonstrated the strong performance of CoFeB-MgO magnetic tunnel junctions at the junction diameter of 40 nm. The same research group then developed a structure using double CoFeB-MgO interfaces and was able to increase the thermal stability factor without increasing the writing current.
*5 5Thermal stability is a factor determining retention time. Δ can be expressed by the energy barrier E that separates two magnetization configurations divided by thermal energy kBT, Δ = E/kBT.
*6 6Tunnel magnetoresistance ratio is a factor in the evaluation of the tunnel magnetoresistance effect. Tunnel magnetoresistance ratio can be expressed by using resistance at parallel configuration (RP) and at antiparallel configuration (RAP), as (RAP-RP)/RP.
Center for Spintronics Integrated Systems, Tohoku University TEL:+81-22-217-6116
This website use cookies to obtain and use access data to understand the convenience and usage of customers. If you agree to use cookies, click "I Accept".
[Privacy Plicy] [Cookie Policy]