2021年2月11日2022年2月22日GaN HEMT Process flow

GaN HEMT fabrication flow

This post is also available in: Japanese Chinese (Simplified)

GaN HEMT (High Electron Mobility Transistor) is a next-generation power semiconductor that has low operating resistance and high breakdown withstand voltage, and is expected to be applied to high-power and high-speed electronic devices.

GAN HEMT Fabrication flow

	1. Forming GaN Epi layer
	2. Ion implantation N+ Introduction of Ion Implanter
	3. Isolate Ion implantation Introduction of Ion Implanter
	4. AlGaN recess or selective etching The indented structure for forming the gate requires very shallow machining. Very low rates, selective etching, and no damage are important. ULVAC etching for forming gate Introduction of Etching system
	5. SiN gate isolation film
	6. Pattering SiN gate isolation film Low damage etching is required Process technology for GaN HEMT Introduction of Etching system
	7. Forming gate electrode & Liftoff Liftoff evaporation is used to form gate electrode.
	8. Forming S/D electrode & Patterning Sputtering Ti/Al and etching to form electrode Process technology for GaN HEMT Introduction of Sputtering system
	9. Attaching support substrate & Polishing
	10. Etching backside Via SiC Via processing the back side Si / SiC to connect the electrodes Process technology for GaN HEMT Introduction of Etching system
	11. Seed Metal A seed layer is formed by sputtering before plating. Process technology for GaN HEMT Introduction of Sputtering system
	12. Plating

Contact Us

https://www.ulvac.co.jp/en/contact/elec_inquiry/